Improvement of Analog-to-Digital Converters testing method that is suitable for testing of high-resolution AD converters (e.g. Σ-Δ or dither-based) or on the contrary ultra high-speed AD converters is presented. The method is based on the histogram test driven by stochastic signal with defined probability density function. By repeating of the test for different settings of band-pass filter that is inserted to the input testing signal path it is possible to obtain an estimation of frequency dependency of effective number of bits. The results have to be recalculated to equivalent band-pass filtering. Practical demonstration confirmed wider applicability than for direct band-pass filter application.

The Analog to digital converter (ADC) has been widely used in all kinds of modern electronic instruments, so it is desirable to find out the relationship between various errors and the performance of ADC and improve the performance with a low cost operation. This paper studies and tries to quantify the relationship between the differential non-linearity (DNL) error, the integral non-linearity (INL) error and the signal to noise ratio (SNR) performance of an ADC, and investigates various methods to reduce the effect of these errors to increase the SNR. Major results are obtained by computer simulation, while a simple analytic model is also investigated. It is found that the loss of SNR due to DNL roughly follows the “6 dB per LSB” rule, and the major cause of the significant SNR loss is primarily due to harmonic distortion introduced by the INL. The investigation of the analytic model of the INL shows that it can predict the SNR loss very similar to the result obtained by computer simulation. We also study various methods to improve the SNR performance of the ADC. It is found that the Midpoint method, although simple, can almost completely eliminate the effect of the INL. It is also shown that if the ratio of the sampling frequency to the input signal frequency is large, the DNL can be further reduced to improve the SNR by Grouping and Sorting method.

In this paper, new state of the art analog-to-digital converters (ADCs) testing techniques both static and dynamic are revised and discussed.
Regarding the static test it is shown that a new technique based on the use of small triangular waves superimposed with a variable offset value as input signal, reduces dramatically the test duration. This histogram based technique can be implemented by using low cost generators even for high resolution ADC testing.
In relation to the dynamic test, a variant of the traditional histogram test using Gaussian noise as stimulus signal is discussed. It allows the test of high frequency, or high resolution ADCs in those cases where the traditional sinusoidal stimuli are not available with the required spectral purity. New techniques to grant convergence of the traditional four-parameter sine fitting algorithms traditionally used in time domain tests are also revised.

This paper deals with some error effects caused by additive noise at analog-to-digital converters (ADCs) testing based on the histogram method and the exponential shape of input testing signal. The histogram method with exponential signals has been an alternative test method for ADC developed by the author. Here, the theoretical analysis of some errors in estimation of code bin width and quantisation levels caused by additive input Gaussian noise is performed. The theoretical results are verified by simulations. The acquired results are compared with the analogues ones for sinewave and Gaussian noise input test signals.

The characterization of complex electronic devices is very important for technical as well as didactic reasons. The characterization of the micro-controllers involves the investigation on its peripheral devices, mainly the ADCs, the PWMs, the timer signals, sometimes the DACs. A testing platform has been realised, with reference to the ST52X430 micro-controller. Moreover, it has been improved in order to test the peripheral devices of the ST52X440 micro-controller. It consists of a board and some programmable instruments connected to a PC, on which the implemented software can run. The user can choice the test to be performed on the basis of the IEEE standard 1241-2001. Some results of the ADC characterization made by using this platform have been presented last year. In this work the use of the realised system for the characterization of the other peripheral devices is presented.