The paper describes the design of a 1GS/s 6-bit ADC in SiGe BiCMOS technology. Several techniques such as subranging, interpolation and averaging were implemented on the original flash architecture in order to achieve low power consumption without sacrificing linearity and dynamic performance.

The paper presents some ideas and results from the attempt to create a comprehensive suite of data processing, C-language functions that enables simplifying the development of new, user oriented software for testing analog to digital converters according the IEEE standards 1057, 1241 and DYNAD. The developed function class covers both dynamic and histogram based test methods. Nowadays, it is prepared in the form of instrument driver - function panel (*.fp) for the software development package Lab Windows⁄CVI by National Instruments. All functions were developed, debugged and tested in this environment.
The paper also contains some results from comparing the new developed function class used in a developed examples of end-user applications with test data processing Matlab software by Kollar and Markus.

Signature analysis techniques have become extremely popular in digital systems testing due to such advantages as simplicity, small amount of additional circuitry, and small degree of error masking. In this paper the signature analysis techniques are applied to mixed (analog-to-digital) systems testing. The general case of multi-channel measurement system is considered.

This paper proposes compensated methods to cancel the effects of charge injection error on switched-current Divider Circuits. Algorithmic structures of current dividers are presented and the final charge injection error is evaluated for each Algorithm. So, compensated methods to cancel this error are proposed.

Voltage to frequency converter (VFC) is an oscillator whose frequency is linearly proportional to control voltage. There are two common VFC architectures: the current steering multivibrator and the charge-balance VFC. For higher linearity, the charge-balancing method is preferred. The charge balanced VFC may be made in asynchronous or synchronous (clocked) forms. The synchronous charge balanced VFC or "sigma delta" (Σ-Δ) VFC is used when output pulses are synchronized to a clock. The charge balance VFC is more complex, more demanding in its supply voltage and current requirements, and more accurate. It is capable of 16 to 18 bit linearity.
Σ-Δ modulator can be used for synchronous VFC (SVFC). The synchronous behaviour is good in many applications, but the output of SVFC is not a pure tone (plus harmonics) like a conventional VFC, but it contains components harmonically related to the clock frequency. The SVFC produces a change in probability density of output pulses N and N+1 clock cycles after the previous output pulse.
In this paper, the modified SVFC (MSVFC) is described. This MSVFC works similarly as conventional SVFC but it has a pure tone on output (for constant input voltage). Therefore, it is possible to measure the period of MSVFC output (this does not work for SVFC).