ADVANCED MODELING AND DESIGN EVALUATION PROCEDURE APPLIED TO PIPELINED A/D CONVERTER

• Abstract:

  This paper deals with a prospective approach of modeling and design evaluation applied to pipelined A/D converter architecture. In contrast with conventional ADC modeling algorithms targeted to extract the maximum ADC nonlinearity error, the innovative approach presented allows to decompose magnitudes of individual error sources from a measured or simulated response of an ADC device. This qualitative decomposition can significantly contribute to the ADC calibration procedure performed in term of integral and differential non-linearity. This is backgrounded by the fact that the knowledge of ADC performance contributors provided by the proposed method helps to adjust the values of on-chip converter components so as to equalize (and possibly minimize) the total non-linearity error. The proposed procedure is demonstrated on a system design example of pipelined A/D converter. Simulation results of each stage of the design evaluation process are given, starting from the INL performance extraction proceeded in a powerful Virtual Testing Environment and finishing by an error source simulation and modeling of pipelined ADC structure, suitable for a generic process flow.
• Download:

  IMEKO-IWADC-2008-107.pdf
• DOI:

  _unreg_tc4-2008.107

Event details:

• IMEKO TC:

  TC4
• Event name:

  IWADC 2008
• Title:

  13th IMEKO TC4 Workshop on ADC Modelling and Testing IWADC (together with XVIth IMEKO TC4 International Symposium on Electrical Measurements and Instrumentation) (IWADC)

• Place:

  Florence, ITALY
• Time:

  22 September 2008 - 24 September 2008