An all-digital A/D converter for fast conversion with 4-TAD parallel construction using moving-average filtering

• Abstract:

  An all-digital A/D converter (ADC) for fast conversion with 4-TAD [1] parallel construction is presented. The basic structure of the TAD is a completely digital circuit including a ring-delay-line (RDL) with delay units (DUs), along with a frequency counter, latch and encoder. The operating principles are, firstly, that the delay time of the DU is modulated by the A/D conversion voltage (Vin); and secondly, that the delay pulse passes through a number of DUs within a sampling (= integration) time, and the number of DUs through which the delay pulse passes is output as conversion data. The single-TAD area is 0.29 mm² (0.65-µm CMOS) with a resolution of 1 mV/LSB (1 MS/s). Also, its non-linearity is ±1% FS per 1000 mV span (1.5-2.5 V). This non-linearity error can be easily compensated for by digital processing using reference points, resulting in FS of less than ±0.1%. A resolution of 12 mV/LSB (40 MS/s) was realized with 4-parallel TAD. Sample holds are unnecessary, and a low-pass filter function [1] removes high-frequency noise simultaneously with A/D conversion. Thus, the combination of this ADC and the digital filter that follows can eliminate the need for an analog pre-filter. Moreover, this ADC can be easily downsized as process technology advances.
• Keywords:

  ADC, moving average, all-digital
• Download:

  IMEKO-IWADC-2003-05.pdf
• DOI:

  _unreg_iwadc-2003.05

Event details:

• IMEKO TC:

  TC4
• Event name:

  IWADC 2003
• Title:

  VIIIth IMEKO TC4 Workshop on ADC modelling and testing

• Place:

  Perugia, ITALY
• Time:

  8 September 2003 - 10 September 2003