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DESIGN OF A DIFFERENTIAL OPERATIONAL AMPLIFIER IN A CLOCKLESS A/D CONVERTER

S. A. Rodrigues, R. C. S. Freire, H. Aboushady, M. M. Louërat, J. I. C. Accioly
  • Abstract:
    This paper presents a differential operational amplifier used in a continuous-time 8-bit folding analog-todigital converter. The clock-less architecture is composed of 8 identical stages with 1 bit/stage. The circuit is designed in a 350nm CMOS process with a supply voltage of 3.3 V. Simulation results show that, with this operational amplifier, the 8-bit clock-less ADC can achieve a Signal-to-Noise and Distortion Ratio of 53 dB. The ADC has a power consumption of 5.51 mW.
  • Keywords:
    differential, operational, amplifier, clock-less, analog-to-digital converter
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  • DOI:
    _unreg_tc4-2011.076

Event details:

[EVENTDETAILS]
  • IMEKO TC:
    TC4
  • Event name:
    TC4 Symposium 2011
  • Title:

    XVIIIth IMEKO TC4 International Symposium on Measurement of Electrical Quantities (part of Metrologia2011, together with IX International Congress on Electrical Metrology - IX SEMETRO)

  • Place:
    Natal, BRAZIL
  • Time:
    27 September 2011 - 30 September 2011