IMEKO Event Proceedings

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Niclas Björsell, Peter Händel
BENEFITS WITH TRUNCATED GAUSSIAN NOISE IN ADC HISTOGRAM TESTS
One method to characterize ADCs is to use a histogram, where Gaussian noise may be used as stimulus signal. However, a Gaussian noise signal that excites all transition levels also generates input values outside working range of the ADC. Modern signal generators can generate arbitrary signals. Hence, excluding undesired values outside the ADC full scale can minimize test sequences. Truncating the signal to the working range gives further advantages, which are explored in this paper. The statistical properties is theoretically evaluated and compared. It is shown that accuracy increases for a fixed sample length and that variation over transition levels decrease.
13th Symposium on Measurements for Research and Industrial Applications, 9th Workshop on ADC Modeling and Testing (IWADC), Athens, Greece, 2004

I. Višcor, J. Halámek
DYNAMIC ERRORS OF INTEGRAL NONLINEARITY MEASURED BY HISTOGRAM
The dynamically tested INL and its hysteresis was measured by the sine-wave histogram. The model of ADC with the hysteresis is tested by a simulation. The suitability of the hysteresis as a complemetary description to INL is discussed in the paper.
13th Symposium on Measurements for Research and Industrial Applications, 9th Workshop on ADC Modeling and Testing (IWADC), Athens, Greece, 2004

Hikaru Yamada
A METHOD TO MEASURE THE SIGNAL AMPLITUDE PROBABILITY DENSITY FUNCTION AVOIDING THE INFLUENCE OF DIFFERENTIAL NON-LINEARITY OF ADC
This paper presents a new method to measure the discrete probability density function (p.d.f.) of an ergodic random path avoiding the influence of differentioal non-linearity of applied ADC. This method is useful to measure the precise p.d.f. by using the successive approximation type ADC or the flash type ADC. The most important field to apply is the radiation pulse height analysis.
13th Symposium on Measurements for Research and Industrial Applications, 9th Workshop on ADC Modeling and Testing (IWADC), Athens, Greece, 2004

F. Stefani, A. Moschitta, D. Macii, P. Carbone, D. Petri
FAST ESTIMATION OF A/D CONVERTER NONLINEARITIES
This paper deals with an innovative strategy to shorten the record size required to estimate the Integral Non-Linearity (INL) of Analog-to-Digital Converters (ADC’s) through the so-called Sinewave Histogram Test (SHT). Such a size reduction is achieved by low-pass filtering the collected sequences of test samples using a simple moving average filter. After some preliminary simulations, the validity of the proposed approach have been confirmed by some experimental results.
13th Symposium on Measurements for Research and Industrial Applications, 9th Workshop on ADC Modeling and Testing (IWADC), Athens, Greece, 2004

Raul Carneiro Martins, António Cruz Serra
MEASUREMENT AND REPRESENTATION OF THE ADC INTEGRAL NONLINEARITY IN THE TIME DOMAIN
In this paper a new approach to the measurement and compensation of the soft components of the integral nonlinearity (INL) of the ADC in the time domain is presented, using both sine and triangular waves. Connection will be established between the user oriented nonlinear description based on memoryless nonlinear models using orthogonal polynomial series and the manufacturer oriented specification, the INL. Using the orthogonal series representation it will also be shown how the nonlinearity of the generator can be compensated a posteriori in the ADC characterization, allowing for a better assessment of the ADC. Finally, simulation results will be presented that portray the applicability of these methods and representations.
13th Symposium on Measurements for Research and Industrial Applications, 9th Workshop on ADC Modeling and Testing (IWADC), Athens, Greece, 2004

Giovanni Chiorboli, Carlo Morandi
PERFORMANCES AND LIMITATIONS OF A TECHNIQUE FOR BACKGROUND CALIBRATION OF CAPACITOR MISMATCH ERRORS IN PIPELINED A/D CONVERTERS
This paper analyses the performances of a recently proposed background calibration technique with digital cancellation of D/A converter noise, which has been recently proposed for high-speed, high-resolution, pipelined Analog-to-Digital Converters (ADCs).
13th Symposium on Measurements for Research and Industrial Applications, 9th Workshop on ADC Modeling and Testing (IWADC), Athens, Greece, 2004

Leopoldo Angrisani, Massimo D’Apuzzo, Mauro D’Arco
A NEW APPROACH TO LINEARITY AND INTERMODULATION ERRORS ESTIMATION IN DIGITAL TO ANALOGUE CONVERTERS
Static testing and diagnostics of digital to analogue converters involve the measurement of the nonlinearity of the converter and the successive estimation of suitable error terms, namely linearity and intermodulation errors. At the state of art, the estimation of the aforementioned error terms is performed by means of two linear transformations, which are applied to the nonlinearity array characterizing the converter. The computational burden of this approach could be too heavy; moreover, practical relations for assessing the uncertainty affecting the results are not available.
An alternative approach for estimating linearity and intermodulation errors is studied and proposed in this paper. By exploiting some nice features of the bit error functions, very straightforward relations that facilitate the estimation of the error parameters and allow a direct evaluation of the uncertainty affecting the results are defined. A number of laboratory tests on an actual D/A converter are conducted in order to assess the reliability and efficiency of the proposed approach.
13th Symposium on Measurements for Research and Industrial Applications, 9th Workshop on ADC Modeling and Testing (IWADC), Athens, Greece, 2004

Umberto Pogliano
ANALYSIS OF A MULTIPLYING DAC EMPLOYED FOR SYNCHRONOUS DETECTION
Multiplying digital to analog converters can be used as synchronous detection circuits by combining a proper code sequence and an analog input at the reference. The output for a periodic signal has been derived under reasonable assumptions. The analysis shows that this type of synchronous detector is sensible only to harmonic components almost equal to a multiple of the number of samples per period. This result can be seen as a generalization of the classical two-level synchronous detection theory.
13th Symposium on Measurements for Research and Industrial Applications, 9th Workshop on ADC Modeling and Testing (IWADC), Athens, Greece, 2004

István Kollár
IMPROVED RESIDUAL ANALYSIS IN ADC TESTING
Analog-to-digital converters are commonly tested by applying a pure sine wave at their inputs. Since the exact parameters of the sine wave are very difficult to precisely obtain, an indirect method is used: the measured samples are used to determine the sine wave which best fits them. The ADC is characterized then by analysis of the differences between the samples and the sine wave. This is described in the IEEE standards 1241-2000 and 1057-1994.
The generally applied method for the fit is least squares (LS). If the error (the deviation of the ADC output samples from the true sine wave) is a random sequence, with independent, identically distributed zero-mean samples, the LS fit effectively averages it out. However, when the quantization errors dominate in the observations, this is not true. Strange, systematic errors may arise, which cannot be averaged out. The paper examines these errors, and makes suggestions how to reduce them.
13th Symposium on Measurements for Research and Industrial Applications, 9th Workshop on ADC Modeling and Testing (IWADC), Athens, Greece, 2004

E. Balestrieri, P. Daponte, S. Rapuano
DIGITAL TO ANALOG CONVERTERS: A METROLOGICAL OVERVIEW
In the last years the technology improvement of Digital-to-Analog Converters (DACs) has extended the use of digital techniques in a multitude of applications. Consequently, there is an increasing attention to DAC topics, from researchers and manufacturers. The paper is aimed at providing a metrological overview and the leading trends of the research in the field of DACs.
13th Symposium on Measurements for Research and Industrial Applications, 9th Workshop on ADC Modeling and Testing (IWADC), Athens, Greece, 2004

V.I. Didenko, A.L. Movchan, J.S. Solodov
BEHAVIOURAL MODELLING OF INSTRUMENTATION DELTA-SIGMA ADC
This paper examines the quantization error of a modulator for delta-sigma analog-to-digital converter (DSADC). In opposite to many papers, the analytical equations are found in time domain. This approach allows the authors to present the modulator as analog-to-digital converter (ADC) of input signal to code for given length of digital sequences at the modulator output. Such presentation is useful for investigation of quantization error for ordinary DSADC and can also be considered as the base for a new ADC type. Both analytical equations and results of simulations are used to find the sources of quantization errors: effect of the scale end, limited number of code transition levels, unequal length of code bin widths, non-ideal digital filters. Some suggestions are made to decrease influence of mentioned sources on quantization error including the new ADC type with conversion delay.
13th Symposium on Measurements for Research and Industrial Applications, 9th Workshop on ADC Modeling and Testing (IWADC), Athens, Greece, 2004

Vladimir Haasz, David Slepicka
FREQUENCY SPECTRUM CORRECTION TEST – PRACTICAL EXPERIENCE
The main problem of the high resolution ADC testing within the frequency range hundreds of kHz to several MHz is the spectral purity of a testing signal. Commercially produced low-distortion generators have the spectral purity sufficient for testing of 16 bits ADCs only up to frequencies of tens of kHz; at higher frequencies the spectral purity of generators is generally worse. Some improvement can bring signal filtering. However, most of the LC filters use coils with ferromagnetic cores for the frequency range up to several hundreds of kHz, which can cause a rise of odd harmonic components. Nevertheless, these components can be measured and subtracted from the spectrum calculated from ADC output data. In the ideal case, only the frequency spectrum corresponding to the ADC non-linearity remains. An ADC measurement system was designed and built for the verification of this method in the frequency range 200 kHz to 1 MHz. The practical experience of its application is described in this paper.
13th Symposium on Measurements for Research and Industrial Applications, 9th Workshop on ADC Modeling and Testing (IWADC), Athens, Greece, 2004

Luca De Vito, Linus Michaeli, Sergio Rapuano
NON-LINEARITY CORRECTION OF ADCS IN SOFTWARE RADIO SYSTEMS
The paper presents the results of the experimental validation of a method for digital compensation of ADC non-linearity errors. First, the theory underlying the method is briefly described. Then, the compensation method has been validated both on sinusoidal signals and on 3^rd generation mobile telecommunication signals, compliant to 3GPP specifications.
13th Symposium on Measurements for Research and Industrial Applications, 9th Workshop on ADC Modeling and Testing (IWADC), Athens, Greece, 2004

J. Halámek, I. Višcor, M. Kasal, M. Villa, P. Cofrancesco
STATIC AND DYNAMIC A/D CONVERTER NONLINEARITY
The ADC’s static and dynamic nonlinearity with relation to harmonic distortion and parameters describing the nonlinearity are discussed. The commonly used description by INL and hysteresis is acceptable only if the dynamic nonlinearity is significantly lower than the static nonlinearity. The significance of dynamic nonlinearity is presented on the measurement and the analysis based on complex spectrum is demonstrated. We call the attention to more detailed tests of ADC according to the dynamic nonlinearity and definition of an optimal working point with maximal SFDR.
13th Symposium on Measurements for Research and Industrial Applications, 9th Workshop on ADC Modeling and Testing (IWADC), Athens, Greece, 2004

Jan Holub, Josef Vedral
STOCHASTIC TEST OF 24BIT-AD CONVERTER – CASE STUDY
Effective number of bits (ENOB) and normality test of code word histogram of Micro-Converter ADUC824 has been evaluated at the FEE CTU Prague and the methodology and results are shown and discussed in the paper.
13th Symposium on Measurements for Research and Industrial Applications, 9th Workshop on ADC Modeling and Testing (IWADC), Athens, Greece, 2004

Henrik Lundin, Patrick Svedman, Xi Zhang, Mikael Skoglund, Peter Händel, Per Zetterberg
ADC IMPERFECTIONS IN MULTIPLE ANTENNA WIRELESS SYSTEMS—AN EXPERIMENTAL STUDY
This paper investigates some of the effects that ADC imperfections may have on wireless communication systems. First, an experimental communication system for wireless multiple-input multiple-output (MIMO) is described. In this test bed, an ADC behavioural model has been implemented. The resulting performance of the communication system, in terms of bit error rate, is assessed when the parameters of the ADC model are altered. The results show that, for this system, the ADC resolution is the key parameter while the non-linearity errors are of minor importance.
13th Symposium on Measurements for Research and Industrial Applications, 9th Workshop on ADC Modeling and Testing (IWADC), Athens, Greece, 2004

Bruno Andò, Salvatore Baglio, Vito Caruso, Nicola Pitrone
A SYSTEM FOR THE CHARACTERIZATION OF THE MICRO-CONTROLLERS
The characterization of complex electronic devices is very important for technical as well as didactic reasons. The characterization of the micro-controllers involves the investigation on its peripheral devices, mainly the ADCs, the PWMs, the timer signals, sometimes the DACs. A testing platform has been realised, with reference to the ST52X430 micro-controller. Moreover, it has been improved in order to test the peripheral devices of the ST52X440 micro-controller. It consists of a board and some programmable instruments connected to a PC, on which the implemented software can run. The user can choice the test to be performed on the basis of the IEEE standard 1241-2001. Some results of the ADC characterization made by using this platform have been presented last year. In this work the use of the realised system for the characterization of the other peripheral devices is presented.
13th Symposium on Measurements for Research and Industrial Applications, 9th Workshop on ADC Modeling and Testing (IWADC), Athens, Greece, 2004

A.A. Platonov, L.M. Malkiewicz, K. Jedrzejewski
ADAPTIVE CADC OPTIMISATION, MODELLING AND TESTING
Analytical approach to optimization, analysis, modeling and testing of the adaptive cyclic (sub-ranging) analog-to-digital converters (CADC) is considered. The particularity of the approach is digital computing the estimates (codes) of the input signal samples using optimal signal - processing algorithm. Upper boundaries for resolution, speed of conversion, and information characteristics are determined. Methodic of advanced CADC model-based simulation investigations is presented. The efficiency of simulation experiments as reliable, convenient and low-cost tool significantly simplifying and accelerating the search for optimal variants, design and analysis of CADC is shown.
13th Symposium on Measurements for Research and Industrial Applications, 9th Workshop on ADC Modeling and Testing (IWADC), Athens, Greece, 2004

Jan Saliga, Linus Michaeli, Roland Holcer
NOISE INFLUENCE ON EXPONENTIAL HISTOGRAM ADC TEST
This paper deals with some error effects caused by additive noise at analog-to-digital converters (ADCs) testing based on the histogram method and the exponential shape of input testing signal. The histogram method with exponential signals has been an alternative test method for ADC developed by the author. Here, the theoretical analysis of some errors in estimation of code bin width and quantisation levels caused by additive input Gaussian noise is performed. The theoretical results are verified by simulations. The acquired results are compared with the analogues ones for sinewave and Gaussian noise input test signals.
13th Symposium on Measurements for Research and Industrial Applications, 9th Workshop on ADC Modeling and Testing (IWADC), Athens, Greece, 2004

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